SCALPEL: Projection Electron Beam LithographyInvited

Much of the tremendous progress in integrated circuit technology and performance over the past 30 years has been fuelled by the progress in lithography. The ability to print increasingly smaller features has enabled higher speed transistors, higher packing densities and lower power dissipation in CMOS circuits. The productivity of the integrated circuit industry has been on a very steep performance curve, historically improving cost per function of integrated circuits by 30% per year over this period. Roughly half of this productivity improvement is attributable to continuos improvements in lithography technology. The remainder is made up of wafer and chip size increases and circuit design and process innovations. Leading edge production lithography employs optical projection printing operating at the conventional Raleigh diffraction limit. Generally speaking, the smallest features that can be reliably printed are equal to the wavelength of the light being used. The wavelength of light used for production lithography has decreased historically on an exponential trend curve as illustrated in Figure 1. Light sources have evolved from Mercury arc lamps where they were filtered for the g-line (435 nm) and then I-line (365 nm). Recently, excimer lasers have been introduced as light sources. KrF excimer lasers produce light in the deep ultraviolet (deep uv or DUV) at a wavelength of 248 nm. This source is used currently to produce the most advanced circuits with minimum design rules of 250 nm. Actually, some manufacturers use 248 nm DUV to print transistor gate features as small as 160 nm with resolution enhancement technologies (RET) which allow, in some cases, printing of features somewhat below the conventional diffraction limit. The issue with optical lithography, which has been characterized by some as a crisis, is also illustrated in Figure 1. Although the progress in optical lithography has been on an exponential improvement curve due to shrinking wavelengths, the slope of the productivity curve for integrated circuits is on a much steeper slope (commonly referred to as Moore’s Law). In fact, the two curves intersect at about the KrF (248nm) node for optics and 250 nm node for circuits. This implies, that to make further progress, either new shorter wavelength printing (such as ArF at 193 nm or F2 at 157 nm) systems must be available sooner than the historical trend (very unlikely) or circuits must be printed below the diffraction limit (which is already beginning to happen). Resolution enhancement technologies or RET allow sub-diffraction printing by controlling the phase as well as amplitude of the light at the image plane in the printing system through the use of phase shifting masks and other “tricks”. One other method uses pre-distorted amplitude patterns at the image plane to compensate for some diffraction effects (optical proximity effect correction or OPC). Further, control of the distribution and angle of light (off-axis illumination or OAI) at the illumination aperture can accentuate higher diffraction orders leading to improved performance. These methods are often used in combinations optimized for the particular pattern being printed.